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| IN74ACT257 QUAD 2-INPUT DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS High-Speed Silicon-Gate CMOS The IN74ACT257 is identical in pinout to the LS/ALS257, HC/HCT257. The IN74ACT257 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device selects a (4-bit) nibble from either the A or B inputs as determined by the Select input. The nibble is presented at the outputs in noninverted from when the Output Enable pin is at a low level. A high level on the Output Enable pin switches the outputs into the highimpedance state. * TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 A; 0.1 A @ 25C Outputs Source/Sink 24 mA * * * * ORDERING INFORMATION IN74ACT257N Plastic IN74ACT257D SOIC TA = -40 to 85 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM PIN 16 =VCC PIN 8 = GND FUNCTION TABLE Inputs Outputs Output Select Y0-Y3 Enable H X Z L L A0-A3 L H B0-B3 X=don't care Z = high-impedance state A0-A3,B0-B3=the levels of the respective Nibble Inputs 1 IN74ACT257 MAXIMUM RATINGS* Symbol Parameter Value VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 IIN DC Input Current, per Pin 20 IOUT DC Output Sink/Source Current, per Pin 50 ICC DC Supply Current, VCC and GND Pins 50 PD Power Dissipation in Still Air, Plastic DIP+ 750 SOIC Package+ 500 Tstg Storage Temperature -65 to +150 TL Lead Temperature, 1 mm from Case for 10 260 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) TJ Junction Temperature (PDIP) TA Operating Temperature, All Package Types IOH Output Current - High IOL Output Current - Low tr, tf Input Rise and Fall Time * VCC =4.5 V VCC =5.5 V (except Schmitt Inputs) * VIN from 0.8 V to 2.0 V Min 4.5 0 -40 Max 5.5 VCC 140 +85 -24 24 10 8.0 Unit V V V mA mA mA mW C C 0 0 Unit V V C C mA mA ns/V This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74ACT257 DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) VCC Guaranteed Limits Symbol Parameter Test Conditions V 25 C -40C to 85C VIH Minimum High- VOUT=0.1 V or VCC-0.1 V 4.5 2.0 2.0 Level Input Voltage 5.5 2.0 2.0 VIL Maximum Low - VOUT=0.1 V or VCC-0.1 V 4.5 0.8 0.8 Level Input Voltage 5.5 0.8 0.8 VOH Minimum High- IOUT -50 A 4.5 4.4 4.4 Level Output 5.5 5.4 5.4 Voltage * VIN=VIH or VIL IOH=-24 mA 4.5 3.86 3.76 IOH=-24 mA 5.5 4.86 4.76 VOL Maximum Low- IOUT 50 A 4.5 0.1 0.1 Level Output 5.5 0.1 0.1 Voltage * VIN=VIH or VIL IOL=24 mA 4.5 0.36 0.44 IOL=24 mA 5.5 0.36 0.44 IIN Maximum Input VIN=VCC or GND 5.5 0.1 1.0 Leakage Current 5.5 1.5 Additional Max. VIN=VCC - 2.1 V ICCT ICC/Input IOZ Maximum Three- VIN (OE)= VIH or VIL 5.5 0.5 5.0 State Leakage VIN =VCC or GND Current VOUT =VCC or GND IOLD +Minimum Dynamic VOLD=1.65 V Max 5.5 75 Output Current IOHD +Minimum Dynamic VOHD=3.85 V Min 5.5 -75 Output Current ICC Maximum VIN=VCC or GND 5.5 8.0 80 Quiescent Supply Current (per Package) * All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Unit V V V V A mA A mA mA A 3 IN74ACT257 AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V 10%, CL=50pF, Input tr=tf=3.0 ns) Guaranteed Limits Symbol Parameter 25 C -40C to 85C Min Max Min Max tPLH Propagation Delay, Nibble A or B to Output Y 1.5 7.0 1.0 7.5 (Figure 1) tPHL Propagation Delay, Nibble A or B to Output Y 2.0 7.5 1.5 8.5 (Figure 1) tPLH Propagation Delay, Select to Output Y 2.0 9.5 1.5 10.5 (Figure 2) tPHL Propagation Delay, Select to Output Y 2.5 10.5 2.0 11.5 (Figure 2) tPZH Propagation Delay, Output Enable to Output Y 2.0 8.0 1.5 9.0 (Figure 3) tPZL Propagation Delay, Output Enable to Output Y 2.0 8.0 1.5 9.0 (Figure 3) tPHZ Propagation Delay, Output Enable to Output Y 2.5 9.0 1.5 10.0 (Figure 3) tPLZ Propagation Delay, Output Enable to Output Y 2.0 7.5 1.5 8.5 (Figure 3) CIN Maximum Input Capacitance 4.5 4.5 Typical @25C,VCC=5.0 V 50 Unit ns ns ns ns ns ns ns ns pF CPD Power Dissipation Capacitance pF Figure 1. Switching Waveforms Figure 2. Switching Waveforms 4 IN74ACT257 Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM 5 |
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